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1/28 xc9250/xc9251 series 30v driver transistor built-in step-down dc/dc converters a pplications car navigation systems car audios industrial equipment features input voltage : 7 30 v fb voltage : 0.8v 2 oscillation frequency : 300khz, 500khz maximum output current : 2.0a control method : pwm (xc9250) pwm/pfm (xc9251) soft-start : external capacitor (set by external capacitor c) protection circuit : over current protection 3.2a (typ.) integral latch method (xc9250/51a) automatic recovery (xc9250/51b) thermal shutdown low esr ceramic capacitor : ceramic capacitor operating ambient temperature : -40 ~ +105 package : sop-8fd environmentally friendly : eu rohs compliant, pb free *performance depends on external components and wiring on the pcb. general description the xc9250/xc9251 series are 30v operation step-down dc/dc converter ics with an internal driver tr ansistor. the internal nch d river transistor is driven by bootstrap to achiev e a stable, high-efficiency power supply up to an output current of 2.0a. low esr ca pacitors such as ceramic capacitors can be used for the load capacitor (c l ). a 0.8v reference voltage source is incorporated in the ic, and the output voltage can be set to a value from 1.2v to 12.0v usin g external resistors (r fb1 , r fb2 ). 300khz or 500khz can be selected for the switching frequency. the generation of unneeded noise can be suppressed by synchronizi ng to an external clk in a range of 25% of the free running frequency using the sync pin. in automatic pwm/pfm control, the ic operates by pfm control when the load is light to ac hieve high efficiency over the fu ll load range from light to heavy. the soft start time can be set as desired by adding an external capacitance to the ss pin. with the built-in uvlo function, the driver transistor is forced off when input voltage becomes 4.5v or lower. internal protection circuits include over current protection, integral latch protec tion, short-circuit protection, and thermal shutdown circuits to enable safe use. etr05023-004 typical application circuit typical performance characteristics xc9250x085/xc9251x085 (v in =12v , v out =5v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=15 h(clf12555-150m) , c in 1 =10 f( grm 32er71h106ka12l) , sbd=cms15, c l =22 f 2(grm32er71e226ke15l)
2/28 xc9250/xc9251 series block diagram 1) xc9250 series, type a * diodes inside the circuit are esd pr otection diodes and parasitic diodes. 2) xc9250 series, type b * diodes inside the circuit are esd pr otection diodes and parasitic diodes.
3/28 xc9250/xc9251 series block diagram (continued) 3) xc9251 series, type a * diodes inside the circuit are esd pr otection diodes and parasitic diodes. 4) xc9251 series, type b * diodes inside the circuit are esd pr otection diodes and parasitic diodes.
4/28 xc9250/xc9251 series product classification ordering information xc9250 ????? - pwm xc9251 ????? - pwm/pfm auto designator item symbol description a functional selection b refer to selection guide ? adjustable output voltage 08 output voltage can be adjusted in 1.2v to 12v 3 300khz oscillation frequency 5 500khz ? - (*1) package (order unit) qr-g sop-8fd (1,000/reel) (*1) the ?-g? suffix denotes halogen and antimony free as well as being fully rohs compliant. selection guide type current limitter latch protection chip enable uvlo a yes yes (*1) yes yes b yes no yes yes type thermal shutdown soft-start synchronized with external clock a yes yes yes b yes yes yes (*1) the over-current protection la tch is an integral latch type. pin configuration * the dissipation pad for this ic should be so lder-plated for mounting strength and heat dissipation. please refer to the reference m ount pattern and metal masking. the dissipation pad should be connected to the gnd (no. 6) pin.
5/28 xc9250/xc9251 series pin assignment pin number sop-8fd pin name functions 1 v in power input 2 ce chip enable 3 sync external clk sync pin 4 fb output voltage sense 5 ss soft-start adjustment 6 gnd ground 7 bst bootstrap 8 lx switching output function pin name signal status l stand-by h active ce open undefined state (*1) l h operates with internal clock frequency clk synchronizes with external clock signal sync open undefined state (*1) (*1) please do not leave the ce and sync pin open. absolute maximum ratings parameter symbol ratings units v in pin voltage v in -0.3 +36 v bst pin voltage v bst -0.3 or v lx -0.3 (*1) v lx +6.5 or +36 (*2) v fb pin voltage v fb -0.3 +6.5 v sync pin voltage v sync -0.3 +6.5 v ce pin voltage v ce -0.3 +36 v ss pin voltage v css -0.3 +6.5 v lx pin voltage v lx -0.3 v in +0.3 or +36 (*3) v lx pin current i lx 4.2 a 300 power dissipation pd 1500 (pcb mounted) mw surge voltage v surge 46 (*4) v operating ambient temperature topr -40 +105 storage temperature tstg -55 +125 ta = 2 5 * all voltages are described based on the gnd pin. (*1) the maximum value should be either -0.3 or v lx -0.3 in the lowest. (*2) the maximum value should be either v lx +6.5 or +36 in the lowest. (*3) the maximum value should be either v in +0.3 or +36 in the lowest. (*4) applied time Q 400ms
6/28 xc9250/xc9251 series electrical characteristics xc9250a/b083 parameter symbol conditions min. typ. max. units circuit fb voltage v fb1 v fb =0.816v 0.784v, v ss =6v, v fb voltage when lx pin oscillates 0.784 0.8 0.816 v fb voltage temperature characteristics ? v fb / ( ? topr ? v fb ) -40 Q topr Q 105 - 50 - ppm/ output voltage setting range v outset - 1.2 (*1) - 12 v - operating voltage range v in - 7 - 30 v - uvlo detect voltage v uvlo1 v in =4.9v 4.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "h" level to "l" level 4.3 4.6 4.9 v uvlo release voltage v uvlo2 v in =4.7v 5.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "l" level to "h" level 4.7 5.0 5.3 v quiescent current i q v in =v ce =30v, v fb =0.95v - 200 310 a stand-by current i stb v in =30v, v ce =0v, v ss =0v, v sync =0v - 0.01 0.1 a oscillation frequency f osc connected to external components, i out =300ma 270 300 330 khz external clock signal synchronized frequency syncosc connected to external components, i out =0ma f osc x0.75 f osc f osc x1.25 khz external clock signal duty cycle d sync connected to external components, i out =0ma 25 - 75 % maximum duty cycle d max v fb =0.65v 83 85 88 % minimum duty cycle d min v fb =0.95v - - 0 % lx sw on resistance r lx v fb =0.65v, v ss =6v - 0.3 0.6 ? current limit (*2) i lim v fb =0.65v, v ss =6v 2.4 3.2 - a latch time t lat xc9250a series only connected to external components, v fb =0.65v, v ss =6v 0.8 1.3 1.8 ms short detect voltage v short xc9250b series only, connected to external components, v fb =0.45v 0.35v, v ss =6v v fb voltage when oscillation frequency is decreased 0.35 0.40 0.45 v internal soft-start time t ss1 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v time until lx pin oscillates 0.8 1.3 2.0 ms external soft-start time t ss2 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v, c ss =0.01 f time until lx pin oscillates 9 15 24 ms efficiency (*3) effi connected to external components, i out =1a - 91 - % sync ?h? voltage v synch connected to external components, i out =0ma 1.5 - 6 v sync ?l? voltage v syncl connected to external components, i out =0ma - - 0.4 v sync ?h? current i synch v in =v ce =30v, v sync =6v, v fb =0.95v -0.1 0 0.1 a sync ?l? current i syncl v in =v ce =30v, v sync =0v, v fb =0.95v -0.1 0 0.1 a fb ?h? current i fbh v in =v ce =30v, v fb =6v, v ss =6v -0.1 0 0.1 v fb ?l? current i fbl v in =v ce =30v, v fb =0v, v ss =6v -0.1 0 0.1 v ce ?h? voltage v ceh v ce =1.0v 2.8v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "l" level to "h" 2.8 - 30 v ce ?l? voltage v cel v ce =2.8v 1.0v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "h" level to "l" - - 1 v ce ?h? current i ceh v in =v ce =30v, v fb =0.95v -0.1 0 0.1 a ce ?l? current i cel v in =30v, v ce =0v, v fb =0.95v -0.1 0 0.1 a thermal shutdown temperature t tsd junction temperature - 150 - - hysteresis width t hys junction temperature - 25 - - ta=25 note: unless otherwise stated, v in =v ce =12v, v sync =2v, v ss =2v external components: unless otherwise stated, l=22 h, c in =10 f, c l =47 f, c bst =1 f, r fb1 =2k ? , r fb2 =390 ? , c fb =10nf (*1) limited by a minimum on time of 0.22 s (typ.). (*2) current limit denotes the level of detection at peak of coil current. (*3) effi=[(output voltage output current)(inputvoltage input current)]100
7/28 xc9250/xc9251 series electrical characteristics (continued) xc9251a/b083 parameter symbol conditions min. typ. max. units circuit fb voltage v fb1 v fb =0.816v 0.784v, v ss =6v v fb voltage when lx pin oscillates 0.784 0.8 0.816 v fb voltage temperature characteristics ? v fb / ( ? topr ? v fb ) -40 Q topr Q 105 - 50 - ppm/ output voltage setting range v outset - 1.2 (*1) - v in -3 or 12 (*2) v - operating voltage range v in - 7 - 30 v - uvlo detect voltage v uvlo1 v in =4.9v 4.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "h" level to "l" level 4.3 4.6 4.9 v uvlo release voltage v uvlo2 v in =4.7v 5.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "l" level to "h" level 4.7 5.0 5.3 v quiescent current i q v in =v ce =30v, v fb =0.95v - 200 310 a stand-by current i stb v in =30v, v ce =0v, v ss =0v, v sync =0v - 0.01 0.1 a oscillation frequency f osc connected to external components, i out =300ma 270 300 330 khz external clock signal synchronized frequency syncosc connected to external components, i out =0ma f osc x0.75 f osc f osc x1.25 khz external clock signal duty cycle d sync connected to external components, i out =0ma 25 - 75 % maximum duty cycle d max v fb =0.65v 83 85 88 % minimum duty cycle d min v fb =0.95v - - 0 % lx sw on resistance r lx v fb =0.65v, v ss =6v - 0.3 0.6 ? pfm switch current i pfm connected to external components, i out =0ma 80 160 240 ma current limit (*3) i lim v fb =0.65v, v ss =6v 2.4 3.2 - a latch time t lat xc9251a series only, connected to external components, v fb =0.65v, v ss =6v 0.8 1.3 1.8 ms short detect voltage v short xc9251b series only, connected to external components, v fb =0.45v 0.35v, v ss =6v v fb voltage when oscillation frequency is decreased 0.35 0.40 0.45 v internal soft-start time t ss1 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v time until lx pin oscillates 0.8 1.3 2.0 ms external soft-start time t ss2 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v, c ss =0.01 f time until lx pin oscillates 9 15 24 ms efficiency (*4) effi connected to external components, i out =1a - 91 - % sync ?h? voltage v synch connected to external components, i out =0ma 1.5 - 6 v sync ?l? voltage v syncl connected to external components, i out =0ma - - 0.4 v sync ?h? current i synch v in =v ce =30v, v sync =6v, v fb =0.95v -0.1 0 0.1 a sync ?l? current i syncl v in =v ce =30v, v sync =0v, v fb =0.95v -0.1 0 0.1 a fb ?h? current i fbh v in =v ce =30v, v fb =6v, v ss =6v -0.1 0 0.1 v fb ?l? current i fbl v in =v ce =30v, v fb =0v, v ss =6v -0.1 0 0.1 v ce ?h? voltage v ceh v ce =1.0v 2.8v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "l" level to "h" 2.8 - 30 v ce ?l? voltage v cel v ce =2.8v 1.0v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "h" level to "l" - - 1 v ce ?h? current i ceh v in =v ce =30v, v fb =0.95v -0.1 0 0.1 a ce ?l? current i cel v in =30v, v ce =0v, v fb =0.95v -0.1 0 0.1 a thermal shutdown temperature t tsd junction temperature - 150 - - hysteresis width t hys junction temperature - 25 - - ta = 2 5 note: unless otherwise stated, v in =v ce =12v, v sync =2v, v ss =2v external components: unless otherwise stated, l=22 h, c in =10 f, c l =47 f, c bst =1 f, r fb1 =2k ? , r fb2 =390 ? , c fb =10nf (*1) limited by a minimum on time of 0.22 s (typ.). (*2) v in -3 or 12, whichever is lower. (*3) current limit denotes the level of detection at peak of coil current. (*4) effi= [( out p ut volta g e out p ut current ) ( in p utvolta g e in p ut current )] 100
8/28 xc9250/xc9251 series electrical characteristics (continued) xc9250a/b085 parameter symbol conditions min. typ. max. units circuit fb voltage v fb1 v fb =0.816v 0.784v, v ss =6v v fb voltage when lx pin oscillates 0.784 0.8 0.816 v fb voltage temperature characteristics ? v fb / ( ? topr ? v fb ) -40 Q topr Q 105 - 50 - ppm/ output voltage setting range v outset 1.2 (*1) - 12 v - operating voltage range v in 7 - 30 v - uvlo detect voltage v uvlo1 v in =4.9v 4.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "h" level to "l" level 4.3 4.6 4.9 v uvlo release voltage v uvlo2 v in =4.7v 5.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "l" level to "h" level 4.7 5.0 5.3 v quiescent current i q v in =v ce =30v, v fb =0.95v - 250 360 a stand-by current i stb v in =30v, v ce =0v, v ss =0v, v sync =0v - 0.01 0.1 a oscillation frequency f osc connected to external components, i out =300ma 450 500 550 khz external clock signal synchronized frequency syncosc connected to external components, i out =0ma f osc x0.75 f osc f osc x1.25 khz external clock signal duty cycle d sync connected to external components, i out =0ma 25 - 75 % maximum duty cycle d max v fb =0.65v 83 85 88 % minimum duty cycle d min v fb =0.95v - - 0 % lx sw on resistance r lx v fb =0.65v, v ss =6v - 0.3 0.6 ? current limit (*2) i lim v fb =0.65v, v ss =6v 2.4 3.2 - a latch time t lat xc9250a series only, connected to external components, v fb =0.65v, v ss =6v 0.4 0.7 1.0 ms short detect voltage v short xc9250b series only, connected to external components, v fb =0.45v 0.35v, v ss =6v v fb voltage when oscillation frequency is decreased 0.35 0.40 0.45 v internal soft-start time t ss1 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v time until lx pin oscillates 0.4 0.7 1.2 ms external soft-start time t ss2 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v, c ss =0.01 f time until lx pin oscillates 5 9 15 ms efficiency (*3) effi connected to external components, i out =1a - 91 - % sync ?h? voltage v synch connected to external components, i out =0ma 1.5 - 6 v sync ?l? voltage v syncl connected to external components, i out =0ma - - 0.4 v sync ?h? current i synch v in =v ce =30v, v sync =6v, v fb =0.95v -0.1 0 0.1 a sync ?l? current i syncl v in =v ce =30v, v sync =0v, v fb =0.95v -0.1 0 0.1 a fb ?h? current i fbh v in =v ce =30v, v fb =6v, v ss =6v -0.1 0 0.1 v fb ?l? current i fbl v in =v ce =30v, v fb =0v, v ss =6v -0.1 0 0.1 v ce ?h? voltage v ceh v ce =1.0v 2.8v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "l" level to "h" 2.8 - 30 v ce ?l? voltage v cel v ce =2.8v 1.0v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "h" level to "l" - - 1 v ce ?h? current i ceh v in =v ce =30v, v fb =0.95v -0.1 0 0.1 a ce ?l? current i cel v in =30v, v ce =0v, v fb =0.95v -0.1 0 0.1 a thermal shutdown temperature t tsd junction temperature - 150 - - hysteresis width t hys junction temperature - 25 - - ta=25 note: unless otherwise stated, v in =v ce =12v, v sync =2v, v ss =2v external components: unless otherwise stated, l=22 h, c in =10 f, c l =47 f, c bst =1 f, r fb1 =2k ? , r fb2 =390 ? , c fb =10nf (*1) limited by a minimum on time of 0.15 s (typ.). (*2) current limit denotes the level of detection at peak of coil current. (*3) effi=[(output voltage output current)(inputvoltage input current)]100
9/28 xc9250/xc9251 series electrical characteristics (continued) xc9251a/b085 parameter symbol conditions min. typ. max. units circuit fb voltage v fb1 v fb =0.816v 0.784v, v ss =6v v fb voltage when lx pin oscillates 0.784 0.8 0.816 v fb voltage temperature characteristics ? v fb / ( ? topr ? v fb ) -40 Q topr Q 105 - 50 - ppm/ output voltage setting range v outset 1.2 (*1) - v in -3 or 12 (*2) v - operating voltage range v in 7 - 30 v - uvlo detect voltage v uvlo1 v in =4.9v 4.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "h" level to "l" level 4.3 4.6 4.9 v uvlo release voltage v uvlo2 v in =4.7v 5.3v, v fb =0.65v, v ss =6v v in voltage when lx pin voltage changes from "l" level to "h" level 4.7 5.0 5.3 v quiescent current i q v in =v ce =30v, v fb =0.95v - 250 360 a stand-by current i stb v in =30v, v ce =0v, v ss =0v, v sync =0v - 0.01 0.1 a oscillation frequency f osc connected to external components, i out =300ma 450 500 550 khz external clock signal synchronized frequency syncosc connected to external components, i out =0ma f osc x0.75 f osc f osc x1.25 khz external clock signal duty cycle d sync connected to external components, i out =0ma 25 - 75 % maximum duty cycle d max v fb =0.65v 83 85 88 % minimum duty cycle d min v fb =0.95v - - 0 % lx sw on resistance r lx v fb =0.65v, v ss =6v - 0.3 0.6 ? pfm switch current i pfm connected to external components, i out =0ma 80 160 240 ma current limit (*3) i lim v fb =0.65v, v ss =6v 2.4 3.2 - a latch time t lat xc9251a series only, connected to external components, v fb =0.65v, v ss =6v 0.4 0.7 1.0 ms short detect voltage v short xc9251b series only, connected to external components, v fb =0.45v 0.35v, v ss =6v v fb voltage when oscillation frequency is decreased 0.35 0.40 0.45 v internal soft-start time t ss1 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v time until lx pin oscillates 0.4 0.7 1.2 ms external soft-start time t ss2 v ce =0 12v, v ss =6v, v fb =v fb1 0.9v, c ss =0.01 f time until lx pin oscillates 5 9 15 ms efficiency (*4) effi connected to external components, i out =1a - 91 - % sync ?h? voltage v synch connected to external components, i out =0ma 1.5 - 6 v sync ?l? voltage v syncl connected to external components, i out =0ma - - 0.4 v sync ?h? current i synch v in =v ce =30v, v sync =6v, v fb =0.95v -0.1 0 0.1 a sync ?l? current i syncl v in =v ce =30v, v sync =0v, v fb =0.95v -0.1 0 0.1 a fb ?h? current i fbh v in =v ce =30v, v fb =6v, v ss =6v -0.1 0 0.1 v fb ?l? current i fbl v in =v ce =30v, v fb =0v, v ss =6v -0.1 0 0.1 v ce ?h? voltage v ceh v ce =0.8v 2.8v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "l" level to "h" 2.8 - 30 v ce ?l? voltage v cel v ce =2.8v 0.8v, v fb =0.65v, v ss =6v v ce voltage when lx pin voltage changes from "h" level to "l" - - 1 v ce ?h? current i ceh v in =v ce =30v, v fb =0.95v -0.1 0 0.1 a ce ?l? current i cel v in =30v, v ce =0v, v fb =0.95v -0.1 0 0.1 a thermal shutdown temperature t tsd junction temperature - 150 - - hysteresis width t hys junction temperature - 25 - - ta = 2 5 note: unless otherwise stated, v in =v ce =12v, v sync =2v, v ss =2v external components: unless otherwise stated, l=22 h, c in =10 f, c l =47 f, c bst =1 f, r fb1 =2k ? , r fb2 =390 ? , c fb =10nf (*1) limited by a minimum on time of 0.15 s (typ.). (*2) v in -3 or 12, whichever is lower. (*3) current limit denotes the level of detection at peak of coil current. (*4) effi=[(output voltage output current)(inputvoltage input current)]100
10/28 xc9250/xc9251 series test circuits v in ce ss sync gnd bst lx fb v a v probe sbd 22h r fb1 r fb2 c fb a 1f 10f 47f v in ce ss sync gnd bst lx fb v v v probe a v 10f 0.01f 6v circuit circuit circuit
11/28 xc9250/xc9251 series test circuits (continued) circuit circuit
12/28 xc9250/xc9251 series typical application circuit typical examples manufacturer product number value clf12555-150m 15 h clf12555-220m 22 h tdk clf12555-330m 33 h l toho zinc tcm-0840-200 20 h c in1 murata grm32er71h106k 10 f/50v c in2 murata grm21bb31h105k 1 f/50v grm32er71a476k 47 f/10v murata grm32er71e226k 22 f/25v 2parallel c l panasonic 25svpd47m 47 f/25v, esr=30m ? sbd toshiba cms15 v f =0.58v (3a) c ss 0.01 f/10v (*1) c sync 1000pf/10v (*2) c bst 1 f/10v (*1) can also be used without c ss (ss pin open). when used without c ss , the ic starts at the soft start time set internally. (*2) can be used without c sync if the external clk synchronization function is not us ed. in this case, connect the sync pin to gnd in close proximity to the ic. the output voltage can be set by adding an external dividing resi stor. the output voltage is determined by the equation below b ased on the values of r fb1 and r fb2 . v out =0.8 (r fb1 +r fb2 )/r fb2 with r fb2 Q 15k ? adjust the value of the phase compensation speed-up capacitor. adjust the c fb value so that fzfb = 1/(2 c fb r fb1 ) is about 10khz. setting example when r fb1 =68k ? , r fb2 =13k ? , v out =0.8(68k ? +13k ? ) / 13k ? P 4.98v when fzfb is set to a target of 10.64khz using the above equation, c fb =1/(2 10.64khz68k ? ) P 220pf if the dropout voltage is too large and the minimum lx on time is not attained, pulse skipping will occur and the output voltag e will not be stable. use with an lx on time longer than the minimum. the minimum on time is 0.22 s (typ.) at a set frequency of 300khz, or 0.15 s (typ.) at a set frequency of 500khz.
13/28 xc9250/xc9251 series typical application circuit (continued) in the xc9250 and xc9251 series, it is optimum to set an induc tance value within the range below based on the set frequency and setting output voltage. f oscset : set frequency v outset : setting output voltage oscset 1.2v Q v outset Q 6v 6v v outset Q 12v 300khz 20 h 22 h 33 h 500khz 15 h 20 h 22 h the soft start time of the xc9250 and xc9251 series can be adjusted ex ternally (ss pin). the soft start time is the time from t he start of v ce until the output voltage reaches 90% of the set voltage. the soft start time depends on the external capacitance c ss , and is determined by the equation below. t ss2 = 1.08 c ss / i ss [ms] c ss : external capacitance [nf] i ss : when f oscset =300khz, 0.72 [ a (typ.)] when f oscset =500khz, 1.2 [ a(typ.)] f oscset : set frequency [khz] * note that the value of the soft start time t ss2 varies depending on the effective capacit ance value of the delay capacitance c ss . calculation example when f oscset =300khz and c ss =10nf, tss2=1.0810/0.72=15ms when f oscset =500khz and c ss =10nf, tss2=1.0810/1.2=9ms the minimum value t ss2 of the soft-start time is set internally. the internal soft-start time t ss1 is determined by the equation below. when f oscset =300khz, tss1=1.3ms typ. when f oscset =500khz, tss1=0.7ms typ.
14/28 xc9250/xc9251 series operational explanation the xc9250/xc9251 series consists internally of a reference volt age supply, ramp wave circuit, error amp, pwm comparator, phase compensation circuit, n-ch mos driver trans istor, current limiting circuit, under-volta ge lockout (uvlo) circuit, internal powe r supply (vl) circuit, thermal shutdown (tsd) circuit, oscill ator (osc) circuit, soft-start circ uit, control block and other elements. the voltage feed back from the fb pin is compared to the internal reference voltage by the error amp, the output from the error amp is phase compensated, and the signal is input to the pwm comparator to de termine the on time of switching during pwm operation. the outp ut signal from the error amp is compared to the ramp wave by the pwm co mparator, and the output is sent to the buffer drive circuit and o utput from the lx pin as the duty width of switching. this operation is performed continuously to stabilize the output voltage. the driver transistor current is monitored at each switching by the output signal from the error amp is modulated as a multi-fe edback signal. this allows a stable feedback system to be obtained even when a low esr ca pacitor such as a ceramic capacitor is used, and this stab ilizes the output voltage. because the ic uses an n-ch mos transistor for the hi side driver, a voltage higher than the v in voltage is required to turn on the driver. to generate a voltage higher than the v in voltage, the bootstrap method is used. xc9251 series, type b the reference voltage source provides the reference volt age to ensure stable output voltage of the dc/dc converter. the ramp wave circuit determines switching frequency. the frequ ency is fixed internally and can be selected from 300khz, 500 k hz. clock pulses generated in this circuit are used to produce ramp waveforms needed for pwm operation. the error amplifier is designed to monitor output voltage. the amplifier compares the reference voltage with the feedback volt age divided by the internal split resistors, r fb1 and r fb2 . when a voltage is lower than the reference voltage, then the voltage is fed back, the output voltage of the error amplifier increases. the error amplifier output is fi xed internally to deliver an opt imized signal to the mixer which is a part of a pwm comparator. the xc9250/xc9251 series can be put in the standby state by inputti ng l level into the ce pin. in the standby state, the quiesc ent current of the ic is 0.01 a (typ.). when h level is input into ce pin, operation starts. t he input of the ce pin is cmos input and the sink current is 0 a (typ.).
15/28 xc9250/xc9251 series operational explanation (continued) the current limiting circuits of type b combine both current limiting and s hort-circuit protection. (1) the current in the n-ch mos driver transistor connected to the lx pin is monitored, and when the load current attains the limit ing current, the current limiting circuit activates and the output voltage drops. (2) as the current limiting state continues, the switching frequency drops to prevent coil current (i l ) overlay. when the current limiting state is released, the switching frequency returns to the set frequency. (3) if the output voltage drops further from states (2), the output current is limited, the switching frequency is lowered further, and the short-circuit state is entered. when the load becomes light er than the short-circuit state, restart takes place automatically. to prevent ove rshoot during restart, restart takes place by soft-start. when the current limiting state continues for a certain time, t he correct limiting circuit of type a latches and stops the lx p in in the "h" level state (turning off the driver tr). to restart operation by soft-start once in the latch stop state, "l" level must be input into the ce pin followed by "h" level, or briefly lowering the v in voltage below the uvlo detection voltage must be performed. the thermal shutdown (tsd) as an over current limit is built in the xc9250/xc9251 series. when the junction temperature reaches the detection temperature, the driver transisto r is forcibly turned off. when the juncti on temperature falls to the release temperature while in the output stop state, restart takes place by soft-start. when the v in pin voltage falls below 4.6v (typ.), extb becomes "h" level and forcibly stops output to prevent false pulse output due to inst able operation of the internal circuits. when the v in pin voltage rises above 5.0v (typ.), the uvlo function is released, the soft-start function activates, and output start operation begins. stopping by uvlo is not shutdown ; only pulse output is stopped and the internal circuits con tinue to operate. current limiting operates if the current limiting state continues, the switching frequency is lowered if v out drops to 50% (typ.) or less of the regular level in the state of or , the output current is reduced, the switching frequency is further lowered, and the ic enters the short-circuit state current limiting operates when the state of continues for 1.3ms (typ. f oscset =300khz) or 0.7ms (typ., f oscset =500khz), the lx pin is latched to ?l? level and operation stops operation restarts by soft start when ce=?l? ?h?
16/28 xc9250/xc9251 series operational explanation (continued) when an external clk ( 25% of free running frequency, on duty 25% to 75%) is input into the sync pin, operation is synchronized to the falling edge of the external clk (external clk synchronization func tion). when synchronized to the external clk, the control mo de is automatically pwm control. when the external clk is fixed at "h" voltage or "l" voltage for about 3 cycles of the free running frequency, external clk synchronization stops and operation at the free running frequency takes place. (1) switching from free running frequency ? external clk synchronization (2) switching from external clk synchronization ? free running frequency synchronized to external clk synchronized to external clk operation at free running frequency synchronized to external clk cycles at falling edge of external clk free running frequency external clk synchronization switching delay (about 5 cycles) when there is no pulse for about 3 cycles, switches to free running frequency
17/28 xc9250/xc9251 series note on use 1. for the phenomenon of temporal and transitional voltage decrease or voltage increase, the ic may be damaged or deteriorated if ic is used beyond the absolute max. specifications. 2. make sure that the absolute maximum ratings of the external components and of this ic are not exceeded. 3. the dc/dc converter characteristics depend greatly on the externally connected com ponents as well as on the characteristics of this ic, so refer to the specifications and standard circ uit examples of each component when care fully considering which components to sele ct. be especially careful of the capacitor characte ristics and use b characteristics (jis stan dard) or x7r, x5r (eia standard) ceramic capacitors. 4. the dc/dc converter of this ic uses a current-limiting ci rcuit to monitor the coil peak current. if the potential dropout vo ltage is large or the load current is large, the peak current will in crease, which makes it easier for current limitation to be applied which in turn coul d cause the operation to become unstable. when the peak current bec omes large, adjust the coil inductance and sufficiently check the operation. the f ollowing formula is used to show the peak current. peak current: ipk = ( v in ? v out ) onduty / ( 2 l f osc ) + i out l: coil inductance [h] f osc : oscillation frequency [hz] i out : load current [a] 5. if the difference between input voltage and output voltage is larg e, when the current limit circuit activates, the switching current might overlap and exceed the current limit spec. due to the circuit delay time. 6. the ripple voltage could be increased when switching from discontinuous conduction mode to c ontinuous conduction mode. pleas e apply the ics only after careful examination by the customer. 7. in some cases, ripple voltage may increase in the xc9251 seri es when the load is light. this is for the purpose of charging the cbst, and is normal operation. 8. the ic enters test mode when a 6v external power supply is applied to the ss pin. do not apply an external power supply to t he ss pin during use. 9. the operation of the ic becomes unst able below the minimum operating voltage. 10. the effects of ambient noise and the state of the circuit board may cause release from the current limiting state, and the latch time may lengthen or latch operation may not take place. te st sufficiently using the actual equipment. 11. when operation changes from free running frequency to external clk synchronization, the output voltage may fluctuate. pleas e apply the ics only after careful examination by the customer. 12. instructions of pattern layouts the operation may become unstable due to noise and/or phase lag fr om the output current when the wire impedance is high, please place the input capacitor(c in1 , c in2 ) and the output capacitor (c l ) as close to the ic as possible. (1) in order to stabilize v in voltage level, we recommend that a by-pass capacitor (c in1 ) be connected as close as possible to the v in pin. (2) in order to stabilize gnd voltage level, we recommend that a by-pass capacitor (c in2 ) be connected as close as possible to the gnd pin. (3) please mount each external component as close to the ic as possible. (4) wire external components as close to the ic as possible and use thick, short connecting traces to reduce the circuit impeda nce. (5) make sure that the gnd traces are as thick as possible, as variations in ground potential caused by high ground currents at the time of switching may result in instability of the ic. (6) because this product cont ains an internal driver, heat is generated due to the i out current and on resistance of the n-ch mos driver transistor.
18/28 xc9250/xc9251 series note on use (continued) 13. torex places an importance on impr oving our products and their reliability. we request that users incorporate fail-sa fe designs and post-aging protec tion treatment when using torex products in their syst ems. front back
19/28 xc9250/xc9251 series typical performance characteristics (1) efficiency vs. output current xc9250x083/xc9251x083 (v in =12v , v out =1.8v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x083/xc9251x083 (v in =12v , v out =5v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x083/xc9251x083 (v in =24v , v out =5v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =12v , v out =1.8v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =12v , v out =5v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =24v , v out =5v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =24v , v out =12v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x083/xc9251x083 (v in =24v , v out =12v) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 output current :i out [ma] efficiency :effi[%] xc9251 xc9250 l=30 h(clf12555-300m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l)
20/28 xc9250/xc9251 series typical performance characteristics (continued) (2) output voltage vs. output currnt xc9250x083/xc9251x083 (v in =12v , v out =1.8v) 1.40 1.50 1.60 1.70 1.80 1.90 2.00 2.10 2.20 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x083/xc9251x083 (v in =12v , v out =5v) 4.40 4.60 4.80 5.00 5.20 5.40 5.60 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x083/xc9251x083 (v in =24v , v out =5v) 4.40 4.60 4.80 5.00 5.20 5.40 5.60 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x083/xc9251x083 (v in =24v , v out =12v) 11.00 11.20 11.40 11.60 11.80 12.00 12.20 12.40 12.60 12.80 13.00 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=30 h(clf12555-300m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =12v , v out =1.8v) 1.40 1.50 1.60 1.70 1.80 1.90 2.00 2.10 2.20 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =12v , v out =5v) 4.40 4.60 4.80 5.00 5.20 5.40 5.60 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =24v , v out =5v) 4.00 4.20 4.40 4.60 4.80 5.00 5.20 5.40 5.60 5.80 6.00 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 (v in =24v , v out =12v) 11.00 11.20 11.40 11.60 11.80 12.00 12.20 12.40 12.60 12.80 13.00 1 10 100 1000 10000 output current :i out [ma] output voltage : v out [v] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l)
21/28 xc9250/xc9251 series typical performance characteristics (continued) (3) ripple voltage vs. output current (4) fb voltage vs. ambient temperature (5) uvlo voltage vs. ambient temperature (6) oscillation frequency vs. ambient temperature (7) supply current vs. ambient temperature xc9250/xc9251 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] uvlo voltage :v uvlo1 ,v uvlo2 [v] detection release xc9250x083/xc9251x083 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] supply current :i q [a] v in =30v xc9250x083/xc9251x083 250 260 270 280 290 300 310 320 330 340 350 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] oscillation frequency :fosc[khz] v in =12v xc9250x083/xc9251x083 (v in =12v , v out =5v) 0 5 10 15 20 25 30 35 40 45 50 0.1 1 10 100 1000 10000 output current :i out [ma] ripple voltage :vr[mv] xc9251 xc9250 l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250/xc9251 0.788 0.790 0.792 0.794 0.796 0.798 0.800 0.802 0.804 0.806 0.808 0.810 0.812 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] fb voltage :v fb [v] v in =12v xc9250x085/xc9251x085 (v in =12v , v out =5v) 0 5 10 15 20 25 30 35 40 45 50 0.1 1 10 100 1000 10000 output current :i out [ma] ripple voltage :vr[mv] xc9251 xc9250 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) xc9250x085/xc9251x085 450 460 470 480 490 500 510 520 530 540 550 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] oscillation frequency :fosc[khz] v in =12v xc9250x085/xc9251x085 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] supply current :i q [a] v in =30v
22/28 xc9250/xc9251 series typical performance characteristics (continued) (8) stand-by current vs. ambient temperature (9) lx sw on resistance vs. ambient temperature (10) max duty vs. ambient temperature (11) pfm switch current vs. ambient temperature (12) ce "h" voltage vs. ambient temperature (13) ce "l" voltage vs. ambient temperature (14) internal soft-start time vs. ambient temperature xc9250/xc9251 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] stand-by current :i stb [a] v in =30v xc9250/xc9251 78.0 80.0 82.0 84.0 86.0 88.0 90.0 92.0 -50-250 255075100125 ambient temperature :ta[] max duty :d max [%] xc9250/xc9251 0.5 1.0 1.5 2.0 2.5 3.0 -50-250 255075100125 ambient temperature :ta[] ce "h" voltage :v ceh [v] vin=30v vin=12v vin=7v xc9250/xc9251 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] lx sw on resistance :r lx [] xc9250/xc9251 0 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] pfm switch current :i pfm [ma] v in =12v xc9250x083/xc9251x083 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] internal soft-start time :t ss1 [ms] v in =12v xc9250/xc9251 0.5 1.0 1.5 2.0 2.5 3.0 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] ce "l" voltage :v cel [v] vin=30v vin=12v vin=7v xc9250x085/xc9251x085 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] internal soft-start time :t ss1 [ms] v in =12v
23/28 xc9250/xc9251 series typical performance characteristics (continued) (15) external soft-start time vs. ambient temperature xc9250x083/xc9251x083 0 5 10 15 20 25 30 35 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] external soft-start time :t ss2 [ms] v in =12v xc9250x085/xc9251x085 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 ambient temperature :ta[] external soft-start time :t ss2 [ms] v in =12v
24/28 xc9250/xc9251 series typical performance characteristics (continued) (16) load transient response v in =12v, v out =5v, i out =300ma 1a v in =12v, v out =5v, i out =1a 300ma v in =12v, v out =5v, i out =1a 2a v in =12v, v out =5v, i out =2a 1a v in =12v, v out =5v, i out =300ma 1a v in =12v, v out =5v, i out =1a 300ma v in =12v, v out =5v, i out =1a 2a v in =12v, v out =5v, i out =2a 1a xc9250x083/xc9251x083 xc9250x083/xc9251x083 xc9250x083/xc9251x083 xc9250x083/xc9251x083 xc9250x085/xc9251x085 xc9250x085/xc9251x085 xc9250x085/xc9251x085 xc9250x085/xc9251x085 v out : 500mv/div i out =300ma 1a 1ms/div 1ms/div v out : 500mv/div i out =1a 300ma l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) v out : 500mv/div i out =1a 2a 1ms/div 1ms/div v out : 500mv/div i out =2a 1a v out : 500mv/div i out =300ma 1a 1ms/div 1ms/div v out : 500mv/div i out =1a 300ma l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) v out : 500mv/div i out =1a 2a 1ms/div 1ms/div v out : 500mv/div i out =2a 1a
25/28 xc9250/xc9251 series typical performance characteristics (continued) (17) rising response time v in =0 12v, v out =5v, i out =1ma v in =0 24v, v out =5v, i out =1ma v in =0 12v, v out =5v, i out =1ma v in =0 24v, v out =5v, i out =1ma (18) input transient response v in =12v 30v, v out =5v, i out =1a v in =30v 12v, v out =5v, i out =1a v in =12v 30v, v out =5v, i out =1a v in =30v 12v, v out =5v, i out =1a xc9250x083/xc9251x083 xc9250x083/xc9251x083 xc9250x085/xc9251x085 xc9250x085/xc9251x085 xc9250x085/xc9251x085 xc9250x085/xc9251x085 xc9250x083/xc9251x083 xc9250x083/xc9251x083 l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) v out : 2v/div v out : 2v/div v in : 0 12v v out : 2v/div 1ms/div 1ms/div v in : 0 24v v out : 2v/div l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) l=22 h(clf12555-220m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) v out : 200mv/div v in =12v 30v 1ms/div 1ms/div v out : 200mv/div v in =30v 12v l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f 2(grm32er71e226ke15l) l=15 h(clf12555-150m), c in1 =10 f(grm32er71h106ka12l), sbd=cms15, c l =22 f2(grm32er71e226ke15l) v out : 200mv/div v in =12v 30v 1ms/div 1ms/div v out : 200mv/div v in =30v 12v v in : 0 12v 1ms/div 1ms/div v in : 0 24v
26/28 xc9250/xc9251 series packaging information sop-8fd (unit: mm) sop-8fd reference pattern layout (unit: mm) sop-8fd reference metal mask design (unit: mm) 4.90.1 0.220.03 (1.27 0.420.09 0.1 bottom view (3.3) 0.6 3.3 1.27 4.88 2.3 1.52
27/28 xc9250/xc9251 series marking rule represents products series represents products type represents fb voltage and oscillation frequency ? represents production lot number 01 09, 0a 0z, 11 9z, a1 a9, aa az, b1 zz in order. (g, i, j, o, q, w excluded) * no character inversion used. mark product series xc9250******-g f xc9251******-g mark product series xc9250a*****-g a xc9251a*****-g xc9250b*****-g b xc9251b*****-g mark voltage (v) oscillation frequency product series 3 300khz xc9250*083**-g 5 0.8 500khz xc9250*085**-g a 300khz xc9251*083**-g b 0.8 500khz xc9251*085**-g 1 23 4 8 7 6 5 sop-8fd
28/28 xc9250/xc9251 series 1. the products and product specifications cont ained herein are subject to change without notice to improve performance characteristic s. consult us, or our representatives before use, to confirm that the informat ion in this datasheet is up to date. 2. we assume no responsibility for any infri ngement of patents, pat ent rights, or other rights arising from the use of any information and circuitry in this datasheet. 3. please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this datasheet. 4. the products in this datasheet are not devel oped, designed, or approved for use with such equipment whose failure of malfuncti on can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. atomic energy; aerospace; transpor t; combustion and associated safety equipment thereof.) 5. please use the products listed in this datasheet within the specified ranges. should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. we assume no responsibility for damage or loss due to abnormal use. 7. all rights reserved. no part of this dat asheet may be copied or reproduced without the prior permission of torex semiconductor ltd.

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